1. Technical Field
This disclosure relates to semiconductor fabrication processes, and more particularly, to methods for increasing a removal rate of a blanket oxide formed on a semiconductor wafer using a fixed abrasive pad.
2. Description of the Related Art
Semiconductor wafers are processed by a plurality of different deposition and removal steps. One such removal process includes chemical-mechanical polishing (CMP). CMP both removes and planarizes a surface of a wafer. CMP is employed to planarize, for example, layer of dielectric material, such as, silicon dioxide. CMP processing typically includes providing a rotatable table, which includes a polish pad and a rotating wafer holder or carrier. In one type of CMP, a slurry is introduced to the polishing pad and the table and the wafer carrier are simultaneously rotated to polish a top surface of the wafer.
Other CMP processes include the use of a slurry-less process, where the abrasive element is embedded into a pad (e.g., a fixed abrasive pad). Fixed abrasive pads are very effective at reducing topological features formed on the surface of the wafer but have a very low removal rate once the topography has been removed. For example, to remove a remaining blanket silicon oxide of 800 xc3x85, the wafer has to be polished for an additional 8 min, even though the bulk of the oxide and its topography have been removed in less than 1 min (for a high density plasma (HDP) silicon oxide deposition of, say, about 8000 xc3x85).
Although fixed abrasive pads simplify CMP processes, the additional time needed to polish planarized layers reduces throughput. Therefore, a need exists for a method for increasing the removal rate of planarized dielectric layers when employing a fixed abrasive pad.
A method for polishing a dielectric layer containing silicon provides a fluorine-based compound during a polishing process. The dielectric layer is polished in the presence of the fluorine based compound to accelerate a polishing rate of the dielectric layer.
Another method for polishing semiconductor wafers having a dielectric layer containing silicon formed thereon includes the steps of contacting the dielectric layer with a polishing pad, providing a fluorine based compound on the polishing pad, and polishing the dielectric layer with the polishing pad in the presence of the fluorine based compound to accelerate a polishing rate of the dielectric layer. Yet another method for polishing semiconductor wafers having a dielectric layer containing silicon formed thereon, includes the steps of providing a fixed abrasive polishing pad on a polishing table, planarizing topographical features formed in the dielectric layer, adding a fluorine based compound on the polishing pad, and polishing the dielectric layer with the polishing pad in the presence of the fluorine based compound to accelerate a polishing rate for bulk removal of the dielectric layer.
In other methods, the fluorine based compound may include a salt containing fluorine. The fluorine based compound may include at least one of NH4F.HF and KHF2. The fluorine based compound may include NH4F in solution with an acid. The acid may include an equivalent molar concentration of NH4F in solution. The fluorine based compound may include at least one of KF and NaF with an acid. The fluorine based compound may include HF. The step of polishing may include polishing a blanket layer of silicon dioxide with a fixed abrasive pad. The method may include the step of accelerating the polishing rate by greater than 2 times over a polish rate provided by the fixed abrasive pad alone by providing the fluorine based compound. The fluorine based compound may include at least one of fluoride salts of amines, aluminum hexafluoride, and tin bifluoride.
These and other objects, features and advantages of the present invention will become apparent from the following detailed description of illustrative embodiments thereof, which is to be read in connection with the accompanying drawings.